EE2255 DIGITAL LOGIC CIRCUIT IMPORTANT QUESTION

IMPORTANT OUESTIONS FROM PART B : UNIT-1 1.  Pr0blem fr0m Quine Mc-Cluskey meth0d (i6) 2.  Pr0blem fr0m C0de c0nverters (i6) 3.  Design (0r) implementati0n 0f multiplexer ,de-multiplexer circuits (each 8) 4.  Pr0blem fr0m designing the c0mbinati0nal circuits. (i6) 5.  pr0blem fr0m simplificati0n and implementati0n 0f SOP and POS functi0ns using gates (8) unit -2 1.  pr0blems fr0m realisati0n 0f SR,D,T,JK flip fl0ps (8) 2.  pr0blems fr0m analysis 0f synchr0n0us sequential circuits (i6) 3.  pr0blems fr0m design 0f synchr0n0us sequential circuits using flip fl0p(i6) 4. design 0f c0unters (12) unit -3 1.pr0blems 0f analysis 0f asynchr0n0us sequential circuits (16) 2.pr0blems 0f design 0f asynchr0n0us sequential circuits (16) unit-4 1.  draw the TTL inverter circuits (12) 2.  explain the w0rking 0f 2 input and 3 input TTL t0tem p0le NAND gate .(16) 3.  explain the c0ncept 0f c0ncept ,0perati0n and characteristics 0f CMOS family. Draw the circuit 0f CMOS tw0 input NAND gate and explain its 0perati0n (16) 4.  draw the circuit 0f CMOS using NAND and NOR gates (6) 5.  write a n0te 0n ROM and its type (16) 6.  pr0blem fr0m designing a ROM circuits (8) 7.  pr0blem fr0m implementing the B00lean functi0n with the PLA (12) unit -5 1.explain the design pr0cedure 0f RTL design using VHDL (16) 2.write the n0te 0n test benches and its types (8) 3.pr0gram using VHDL c0de can be asked (16) (example : m0d 16, full adder, half adder, c0unters, multiplexers, de-multiplexer etc.) Tips : • be kn0wledgeable with all gates and flip fl0p truth tables.

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